In recent years, more and more system design-ers have discovered the importance of Assertion Based Verification (ABV) with complex SoC de-signs. This paper shows the development of a PCI Express macro by adding PSL assertions in a useful way. In Addition it explains how the inter-face is constraint with assertions to ease the in-tegration of the core for IP reuse. Furthermore our experiences with the protocol analyser and exerciser are discussed. Another focus is on the signal integrity, which has been checked on dif-ferent boards with approved measurement equipment. In conclusion, the use of the pre-sented verification methods can dramatically re-duce the time from specification to a running sys-tem.
|Title of host publication||Proceedings of the PCI SIG Developers Conference 2007|
|Publication status||Published - 2007|
|Event||PCI SIG Developers Conference 2007 - San Jose, United States|
Duration: 21 May 2007 → 22 May 2007
|Conference||PCI SIG Developers Conference 2007|
|Period||21.05.2007 → 22.05.2007|