Reduction of the Critical Path of IIR Filters using Continued Fractions

Implementing infinite impulse response (IIR) filters as synchronous sequential circuits is common practice in dig-ital signal processing. In this paper, a decomposition of IIR filter transfer functions in order to reduce the critical path in comparison to the canonical form (transposed direct form II) implementation based on continued fractions is discussed. Moreover, the filtered quantization noise of the resulting con-tinued fraction structure is analyzed. The coefficients of the IIR filters are quantized with the canonical signed digit (CSD) representation. An adder tree structure has been used for the implementation of the multiplications. The continued fraction structure and the canonical form have been implemented in VHDL and synthesized for the Intel Cyclone V FPGA. The synthesis results of the continued fraction structure feature an increased maximum clock frequency in comparison with the canonical form implementation. However, the resource utilization of the continued fraction structure is significantly increased compared to the canonical form implementation. The filtered quantization noise of the continued fraction structure is decreased in comparison to the canonical form implementation.