Effiziente Hardware-Abbildung von PSL-Assertions

Rainer Leonhard Findenig; Markus Pfaff; Florian Eibensteiner; Josef Langer

Effiziente Hardware-Abbildung von PSL-Assertions

Translated title of the contribution: Effiziente Hardware-Abbildung von PSL-Assertions

Rainer Leonhard Findenig, Markus Pfaff, Florian Eibensteiner, Josef Langer

Research output: Chapter in Book/Report/Conference proceedings › Conference contribution › peer-review

Translated title of the contribution	Effiziente Hardware-Abbildung von PSL-Assertions
Original language	German
Title of host publication	Tagungsband Austrochip 2007
Publisher	TU Graz
Pages	85-90
ISBN (Print)	978-3-902465-87-0
Publication status	Published - 2007
Event	Austrochip - Graz, Austria Duration: 11 Oct 2007 → 11 Oct 2007

Conference

Conference	Austrochip
Country/Territory	Austria
City	Graz
Period	11.10.2007 → 11.10.2007

Cite this

@inproceedings{219d413a290445f6b87da6b42d6a2dbd,

title = "Effiziente Hardware-Abbildung von PSL-Assertions",

author = "Findenig, {Rainer Leonhard} and Markus Pfaff and Florian Eibensteiner and Josef Langer",

year = "2007",

language = "Deutsch",

isbn = "978-3-902465-87-0",

pages = "85--90",

booktitle = "Tagungsband Austrochip 2007",

publisher = "TU Graz",

note = "Austrochip ; Conference date: 11-10-2007 Through 11-10-2007",

}

TY - GEN

T1 - Effiziente Hardware-Abbildung von PSL-Assertions

AU - Findenig, Rainer Leonhard

AU - Pfaff, Markus

AU - Eibensteiner, Florian

AU - Langer, Josef

PY - 2007

Y1 - 2007

UR - https://www.researchgate.net/profile/Florian_Eibensteiner/publication/250165122_Effiziente_Hardware-Abbildung_von_PSL-Assertions/links/5465cb5c0cf2052b509f5daa/Effiziente-Hardware-Abbildung-von-PSL-Assertions.pdf

M3 - Konferenzbeitrag

SN - 978-3-902465-87-0

SP - 85

EP - 90

BT - Tagungsband Austrochip 2007

PB - TU Graz

T2 - Austrochip

Y2 - 11 October 2007 through 11 October 2007

ER -

Effiziente Hardware-Abbildung von PSL-Assertions

Conference

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Cite this