Abstract
The elliptic curve digital signature algorithm (ECDSA) is a cryptographic scheme used to generate digital signatures and to verify them.
In the course of this research, two software libraries got implemented that perform an ECDSA signature verification. Those two
implementations of the ECDSA signature verification are discussed and compared regarding their performance. Both implementations
target a single core RISC-V CPU in a minimal simulated test environment. The first implementation is done purely in software, while
the second implementation is done using a coprocessor to accelerate execution. To access this coprocessor, the RISC-V GNU Toolchain
got extended with custominstructions during this research. This is done by reason of the ECDSA and its requirement for especially
large numbers (e.g. 283 bit integers). Handling those numbers in software requires a relatively high amount of execution time,
especially on single core systems with low clock frequency. For those systems, the coprocessor library is very well suited formost
scenarios. If the systems clock frequency is respectively high, then the pure software implementation might fit one’s requirements as
well without the need for additional hardware. Furthermore, if the number of signature verifications is very low (e.g. just once at
application startup), then the coprocessor would require chip area that ismostly unused during runtime.
In the course of this research, two software libraries got implemented that perform an ECDSA signature verification. Those two
implementations of the ECDSA signature verification are discussed and compared regarding their performance. Both implementations
target a single core RISC-V CPU in a minimal simulated test environment. The first implementation is done purely in software, while
the second implementation is done using a coprocessor to accelerate execution. To access this coprocessor, the RISC-V GNU Toolchain
got extended with custominstructions during this research. This is done by reason of the ECDSA and its requirement for especially
large numbers (e.g. 283 bit integers). Handling those numbers in software requires a relatively high amount of execution time,
especially on single core systems with low clock frequency. For those systems, the coprocessor library is very well suited formost
scenarios. If the systems clock frequency is respectively high, then the pure software implementation might fit one’s requirements as
well without the need for additional hardware. Furthermore, if the number of signature verifications is very low (e.g. just once at
application startup), then the coprocessor would require chip area that ismostly unused during runtime.
Original language | English |
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DOIs | |
Publication status | Published - 20 Sept 2024 |
Event | 36th European Modeling and Simulation Symposium, EMSS 2024 - Santa Cruz de Tenerife, Tenerife, Spain Duration: 18 Oct 2023 → 20 Oct 2023 https://www.msc-les.org/emss2024/ |
Conference
Conference | 36th European Modeling and Simulation Symposium, EMSS 2024 |
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Country/Territory | Spain |
City | Tenerife |
Period | 18.10.2023 → 20.10.2023 |
Internet address |
Keywords
- Coprocessor
- Cryptographics
- ECDSA
- Performance Evaluation
- RISC-V