Abstract
Digital hardware in the form of synthesizable sourcecode can be outsourced to real hardware (FPGA), that can be subsequently integrated to the simulation with an existing testbench. Additionaly it is possible to cosimulate pieces of hardware, when a behavioral model is not available, very easily together with modules implemented in a hardware description language and/or a testbench.
Titel in Übersetzung | Acceleration of digital design development by means of using the "Hardware Accelerator and Cosimulator" (HAC) |
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Originalsprache | Deutsch (Österreich) |
Seiten (von - bis) | 456-459 |
Seitenumfang | 4 |
Fachzeitschrift | Elektrotechnik und Informationstechnik |
Jahrgang | 122 |
Ausgabenummer | 12 |
DOIs | |
Publikationsstatus | Veröffentlicht - Dez. 2005 |
Schlagwörter
- Acceleration
- Cosimulation
- Hardware design
- Hardware in the loop
- Simulation